JPH0119396Y2 - - Google Patents

Info

Publication number
JPH0119396Y2
JPH0119396Y2 JP17561582U JP17561582U JPH0119396Y2 JP H0119396 Y2 JPH0119396 Y2 JP H0119396Y2 JP 17561582 U JP17561582 U JP 17561582U JP 17561582 U JP17561582 U JP 17561582U JP H0119396 Y2 JPH0119396 Y2 JP H0119396Y2
Authority
JP
Japan
Prior art keywords
lead wire
wire connection
board
mark
component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP17561582U
Other languages
English (en)
Japanese (ja)
Other versions
JPS5981031U (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1982175615U priority Critical patent/JPS5981031U/ja
Publication of JPS5981031U publication Critical patent/JPS5981031U/ja
Application granted granted Critical
Publication of JPH0119396Y2 publication Critical patent/JPH0119396Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP1982175615U 1982-11-22 1982-11-22 混成集積回路用配線基板 Granted JPS5981031U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1982175615U JPS5981031U (ja) 1982-11-22 1982-11-22 混成集積回路用配線基板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1982175615U JPS5981031U (ja) 1982-11-22 1982-11-22 混成集積回路用配線基板

Publications (2)

Publication Number Publication Date
JPS5981031U JPS5981031U (ja) 1984-05-31
JPH0119396Y2 true JPH0119396Y2 (en]) 1989-06-05

Family

ID=30382022

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1982175615U Granted JPS5981031U (ja) 1982-11-22 1982-11-22 混成集積回路用配線基板

Country Status (1)

Country Link
JP (1) JPS5981031U (en])

Also Published As

Publication number Publication date
JPS5981031U (ja) 1984-05-31

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