JPH0119396Y2 - - Google Patents
Info
- Publication number
- JPH0119396Y2 JPH0119396Y2 JP17561582U JP17561582U JPH0119396Y2 JP H0119396 Y2 JPH0119396 Y2 JP H0119396Y2 JP 17561582 U JP17561582 U JP 17561582U JP 17561582 U JP17561582 U JP 17561582U JP H0119396 Y2 JPH0119396 Y2 JP H0119396Y2
- Authority
- JP
- Japan
- Prior art keywords
- lead wire
- wire connection
- board
- mark
- component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims description 53
- 239000000463 material Substances 0.000 claims description 4
- 239000000758 substrate Substances 0.000 description 9
- 238000007639 printing Methods 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 238000001514 detection method Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 238000003909 pattern recognition Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 239000003973 paint Substances 0.000 description 1
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 1
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1982175615U JPS5981031U (ja) | 1982-11-22 | 1982-11-22 | 混成集積回路用配線基板 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1982175615U JPS5981031U (ja) | 1982-11-22 | 1982-11-22 | 混成集積回路用配線基板 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5981031U JPS5981031U (ja) | 1984-05-31 |
JPH0119396Y2 true JPH0119396Y2 (en]) | 1989-06-05 |
Family
ID=30382022
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1982175615U Granted JPS5981031U (ja) | 1982-11-22 | 1982-11-22 | 混成集積回路用配線基板 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5981031U (en]) |
-
1982
- 1982-11-22 JP JP1982175615U patent/JPS5981031U/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5981031U (ja) | 1984-05-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6365841B1 (en) | Printed circuit board with resist coating defining reference marks | |
JPH0119396Y2 (en]) | ||
JP4522226B2 (ja) | 電子部品素子の実装方法及び電子装置の製造方法 | |
US4991284A (en) | Method for manufacturing thick film circuit board device | |
JPH0644177U (ja) | プリント配線板 | |
JPS5814502A (ja) | 認識マ−クを備えたチツプ抵抗器 | |
JPS5814621Y2 (ja) | プリント配線基板 | |
JPH0613139U (ja) | 配線基板 | |
JPH0531274U (ja) | セラミツク配線基板 | |
JP3692678B2 (ja) | スクリーン印刷方法 | |
JPS6155931A (ja) | 厚膜混成集積回路装置の製造方法 | |
JPH04132235A (ja) | 混成集積回路用配線基板 | |
JPH05335438A (ja) | リードレスチップキャリア | |
JP2002280681A (ja) | 部品実装基板の製造方法、およびプリント配線板 | |
JPS6031249A (ja) | 混成集積回路用基板 | |
JPH0325966A (ja) | 圧膜回路基板の製造方法 | |
JPH065729A (ja) | プリント配線板および半導体素子の位置合わせ方法 | |
JPH08125288A (ja) | 印刷配線板 | |
JPH075650Y2 (ja) | 回路基板 | |
JP2645516B2 (ja) | アイマークを備えたプリント配線板及びその製造方法 | |
JPH0621270Y2 (ja) | プリント配線板 | |
JPH0625981Y2 (ja) | セラミック基板 | |
JPH03297190A (ja) | プリント配線板 | |
JPH0349418Y2 (en]) | ||
JPH0434990A (ja) | 混成集積回路装置の製造方法 |